Class Meetings: Mon, 3:00-3:50 PM  393 CB Tue, 12:2:50 PM  254 CB (490 Students only) Consultation: Office hours -- Tuesday 9-11AM, Wednesday 2-4PM Summary: ECEn 455 is a 1 credit hour lab class to test integrated circuits fabricated by MOSIS.  Students will write data sheets for their components and learn different techniques to test their integrated circuit.  A final report must be written and submitted to MOSIS. ECEn 490 is a 4 credit hour course to build and test an application of your VLSI chip. Prerequisites: ECEn 451 or ECEn 445, and submission of an integrated circuit design to MOSIS. --or-- ECEn 427. Text: There is no text.

Intel Pentium II Processor

Parallel Port Information

• ecp.pdf
• ecp2.pdf
• epp.pdf
• epp2.pdf
• parallel.pdf
• Nathan's Parallel Port Lecture

FPGA Boards

• Design for FPGA by Spencer Isaacson
• I have discovered a problem with the pin locations on the fpga boards. Pin locations for O4 and O5 are switched. O4 should be at 41 but in reality is at 71, O5 should be at 71 but in reality is at 41. This could cause problems for groups using these pin locations. --Spence

ECEn 490/455 Lecture Schedule

ECEn 455 Course Requirements

1. Create a data sheet for their component.  Due 22 Jan 2001
2. Build a test bed for their component, and demonstrate the operation of their chip to the instructor.  If chip is not operational, you must try to find out what went wrong.
3. Submit a MOSIS report online. (You will need to use the design p. word "byu451" on the second line of the report.)

   MOSIS reports are required by MOSIS who funds your project. A one page report is not a high price for you to pay in exchange for $800 worth of services! MOSIS uses the information that it collects to create statistics for quality control.

   You must submit a MOSIS report to pass the class (455 or 490).

ECEn 490 Course Requirements

1. All of the above requirements for ECEn 455. (25% of your grade)
2. Take the business lectures and do the assignments. (25% of your grade)
3. Design and demonstrate an application that uses your chip as a component. (25% of your grade)
4. A final written report and oral report. (25% of your grade)

ECEn 455 Grading

 

Grade	Criteria
A	Data sheet was turned in, and Chip was demonstrated and works as it was designed to work, and The MOSIS report has been turned in.
B	Data sheet was turned in, and Chip was demonstrated, and worked partially, but not entirely. The cause of the problem was traced back to the design and has been described, and The MOSIS report has been turned in.
C	Data sheet was turned in, and Chip was demonstrated and worked parially, but not entirely. The cause of the problem is not known, or, Chip was totally dead and could not be demonstrated, and The MOSIS report has been turned in.
E	Data sheet was not turned in, or The chip was not tested or demonstrated, or The MOSIS report was not turned in.

Data Sheet

A data sheet is designed to sell your component to a paying customer.  See an example Intel data sheet.
Write the data sheet with your customer in mind.
Data sheet must include:

1. A one page summary that includes: the designation and descriptive name of the chip, a list of features that would be of interest to the customer, a short description of what the chip does, and a very high level block diagram showing the chip function.
2. Documentation for the external interface of the chip that includes: a pinout diagram and a pin description table.  The pin description table should include: The name of the pin, the pin number, the pin type, and a brief description of the function of the pin. To determine your pinout, you must use a bonding diagram. This bonding diagram shows how MOSIS connects our standard padframe to pins on the chip. NOTE: There are 3 Vdd and 3 Gnd pins on your chip. Be sure to label them all, and specify that all six pins must be connected externally for the chip to operate correctly.
3. A Description of Operation.  This section should outline the operation of the chip as far as the user of the chip is interested.  It should be a users manual describing programming and control options, data formats, transmission formats, protocols, interfaces, and modes of operation.
4. Example uses, applications, and configurations of your chip.  (Block diagrams showing how your chip could be used in different systems.)
5. DC specifications, which include the absolute maximum and/or minimum ratings should be specified for the supply voltage, input pin voltages for logic high and low inputs, output pin voltages for logic high and low outputs, input loading for each input, output drive capability for each output, quiescent supply current, and pin load and leakage currents.
6. AC specifications, which include minimum and maximum clock rate, setup and hold times of synchronous inputs, clock to output delay times for synchronous outputs, pulse widths, pin to pin delays, and any other critical timing.  Show labeled timing diagrams.

ECEn 455 Demonstration

Build a test bed for your component, and demonstrate the operation of your chip to the instructor.  Demonstrate all modes and all functions.  Demonstrate that each pin is operational.  If chip is not operational, you must try to find out what went wrong.

Written and Oral reports.

Written and oral reports are not part of ECEn 455, but are part of ECEn 490.

Below are some suggestions for your oral and written reports:

Written report

How long should my report be?
Your written report should be about 10-15 pages long, not including tables, figures and diagrams.

What should I put into my report?
You may want to include some of the following as part of your report.  These are only some suggestions.  You probably won't have room to do all of it.
- Background of what you designed.  Its history, purpose, uses, and importance. What is it?  How do you use it?
- Description of your design.   Functional description.  How does it work?   How was the circuit broken down into functional blocks?  What are its main components?  What do they do?  Are there any innovative aspects to your design?  What challenges did you have in designing your chip?  Warning: Don't go into too much detail here about your design, unless it illustrates a point.  Stay at a relatively high, functional level.
- Description of your design methodology.  How did you do the design?  What tools did you use?  What processes, procedures, and methods did you use?  How did you verify and validate your design?
- Description of the layout of your integrated circuit.  Show the floorplan.  Why did you organize the chip in that way?  What constraints did you have to meet in laying out the chip?  What technology did you use?  How many transistors are on your chip?
- Description of the test bed.  Show a schematic of your test circuitry.  What does the test circuitry do?  How does it demonstrate the operation of your chip?  How do you operate the test bed?
- Description of the test.  How did you test your integrated circuit?  What tests did you perform?  What is your test coverage?  What were the results of the test?  Did you find any problems?  If so, did you figure out what caused the problem?  Did you find a solution?
- Summary of your integrated circuit design experience.  What did you learn from this project?  What do you consider significant from your experience?
- Bibliography.  List the sources you got your information from.
- Your data sheet should be included as an appendix.

Who is my audiance?  At what level should should I describe my project?
- Write to a technical audiance: engineers with a training similar to yours.  Explain to them what you did. with enough detail that they understand without putting them to sleep.
- Write to yourself to be read five years from now.  You will have forgotten the details of what you have done.  Tell yourself what you did and how it worked.
 

Oral Report

The time should be divided up as follows:
Presentation: 15 minutes for a group of two, 25 minutes for a group of four. Everyone should participate.
Questions: 5 minutes
Demonstration: 5 minutes

This is not a great amount of time to speak.  If you use transparencies, you should only prepare about 8-10 transparencies for a group of two, and 14-17 transparencies for a group of four (excluding title slide, outline, etc.)  Practice your presentation and time it.

When giving your presentation, do not stand at the projector.  Stand to the side of the screen, facing the audience, so everyone can see both you and the screen.  If you need to point, point to the screen, not to the tranparency.

Come prepared to demonstrate your application, and have it set up and tested before hand.  It doesn't need to be the thorough demenstration that you did to pass off your demonstration requirement for the class, just a quick demo to impress the audiance.  It should only last a few minutes.

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Design For Testability Assignment - Due

For the design-for-testability assignment, do the following:

1. Determine the total # of flip flops in your original design.
2. Determine the # of FETs in your original design.
3. Determine the # of FETs in a flip flop.
4. Determine the # of transistors that would need to be added to make your chip's flip flops scannable. Determine the % overhead this would entail in your complete design (total # of new transistors / total # of original chip transistors)
5. Using the layout of your original flip flop, determine the area required to add the scan FETs from above.  Give a plot/illustration showing how this would be accomplished (no need to do the actual layout but you should convince the reader that you have a good handle on the area required to add them).
6. Using the area from the item above, compute an estimated area overhead for your chip.
7. Compare the results from #4 and #6 - do they agree?  If so, how confident are you in them?  If not, why don't they agree?

Finally, hand in a report summarizing your findings.  Use pictures, tables, whatever will help you present the case you have prepared on scan overhead.

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Electrical and Computer Engineering || College of Engineering || Brigham Young University

Last Updated: Jan 2000 by Doran Wilde