Brigham Young University
Provo, Utah 84602
Dr. Wilde started his career as an electrical engineer in Oregon where he worked 12 years in industry doing microprocessor design at Intel and NCUBE. In 1990, he began graduate studies at Oregon State University, where he received his M.S. and Ph.D. degrees in Computer Science in 1993 and 1995, respectively. In 1995, he joined the faculty in the department of Electrical and Computer Engineering at Brigham Young University where he is currently serving as an associate professor. Dr. Wilde has taught a wide range of computer and electrical engineering courses and has been involved in new computer engineering course development. He has been actively engaged in research in the fields of computer arithmetic, application specific systems and architectures, and autonomous vehicles. Dr. Wilde is a senior member of the IEEE and is the father of seven children and sixteen grandchildren.
My research interestes are in computer arithmetic, embedded systems, robotics, and computer vision.
Refereed conference papers
Bill Teel, Doran Wilde, A logic minimizer for VLSI PLA design, 19th Conference on Design Automation (DAC), pp. 156-162, Jun 1982.
D.K. Wilde, A custom processor for use in a parallel computer system, Proceedings of the IEEE Custom Integrated Circuits Conference, San Diego, California, pp. 10.5/1-10.5/5, May 1989.
R. Andonov, P. Quinton, S. Rajopadhye, and D. Wilde. A Shift Register Based Implementation of the Knapsack Problem Recurrences. PARCELLA`94, pages 207-214.
H. Le Verge, V. Van Dongen, D. Wilde, La synthèse de nids de boucles avec la bibliothèque polyédrique, RenPar’6, Lyon, France, June 1994. English version, Loop Next Synthesis Using the Polyhedral Library, in IRISA TR 830, May 1994.
D. Wilde and O. Sie. Regular Array Synthesis using Alpha. International Conference on Application Specific Processors. pp. 200-211, Aug 1994.
S. J. Bellis, W. Marnane, D. Wilde, P.J. Fish. Systolic Arrays for Modified Covariance Spectral Estimation. EUSIPCO-94, VII European Signal Processing Conference, Sep. 1994.
P. Quinton, S. Rajopadhye, and D. Wilde. Derivation of Data Parallel Code from a Functional Program. 9th International Parallel Processing Symposium (IPPS), pp. 766-772, Santa Barbara, CA. April 1995. IEEE.
P. Quinton, S. Rajopadhye, and D. Wilde. Deriving Imperative Code from Functional Programs. 7th Conference on Functional Programming Languages and Computer Architectures (FPCA), pp. 36-44. La Jolla, CA, Jun 1995. ACM.
S. Rajopadhye, and D. Wilde. The Naive Execution of Affine Recurrence Equations. International Conference on Application Specific Processors. pp. 1-12, July 1995.
S. Rajopadhye and D. Wilde, Memory Reuse Analysis in the Polyhedral Model, EuroPar`96, Second International EuroPar Conference, Lyon, France, in Lecture Notes in Computer Science, V. 1123, Springer, pp. 389-397, August, 1996.
F. de Dinechin, D. Wilde, S. Rajopadhye, and R. Andonov, Regular VLSI Array for an Irregular Algorithm, Irregular`96, Santa Barbara, in Lecture Notes in Computer Science, V. 1117, Springer, pp. 195-200, August, 1996.
Jason Crop, Doran Wilde, Scheduling Structured Systems. EuroPar`99, Fifth International EuroPar Conference, Toulouse, France, in Lecture Notes in Computer Science, V. 1685, Springer, pp. 409-412, Sept. 1999.
Jason Crop, Doran Wilde, Synthesis of Hardware from Affine Recurrence Equations, International Workshop on Logic Synthesis 1999 (IWLS99), June 1999, Lake Tahoe.
Scott Bowden, Sanjay Rajopadhye, Doran Wilde, Quadratic Control Signals in Linear Systolic Arrays, International Conference on Application Specific Systems, Architectures, and Processors, Boston, MA, IEEE Computer Society Press, pp. 268-275, July 2000.
Vincent Loechner, Philippe Clauss, Doran Wilde, Benoît Meister, Rachid Seghir, Gilles Bitran, Julien Léger, PolyLib: A Library for doing Symbolic Polyhedra Operations, International Symposium on Symbolic and Algebraic Computation (ISSAC’2002), July, 2002.
Xiaojun Wang, Brent Nelson, Doran Wilde, Tradeoffs in Designing Floating-Point Division and Square –Root on Virtex FPGAs, FCCM, April 2003.
Spencer Isaacson, Doran Wilde, The Task-Resource Matrix: Control for a Distributed Reconfigurable Multi-Processor Hardware RTOS, International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA’04), pp. 130-136, Las Vegas, June 2004.
B. B. Edwards, W. S. Fife, J. K. Archibald, D. J. Lee, and D. K. Wilde, A Design Approach for Small Vision-based Autonomous Vehicles, SPIE Optics East, Intelligent Robots and Computer Vision XXIV: Algorithms, Techniques, and Active Vision, 63840L, Oct. 3-4, 2006.
Doran K. Wilde, Computing Digit Selection Regions for Digit Recurrences, International Conference on Application-specific Systems, Architectures and Processors (ASAP’2007), Montreal Canada, IEEE Computer Society Press, pp. 284-289, July 2007.
Doran Wilde and James Archibald, The Robot Racer Capstone Project, 2009 American Society for Engineering Education (ASEE) Annual Conference, June 2009.
Doran K. Wilde, Computing Clothoid Segments for Trajectory Generation, 2009 IEEE/RJS International Conference on Intelligent Robots and Systems (IROS), pp. 2440-2445, St. Louis, October 2009.
Spencer G. Fowers, D. J. Lee, and Doran Wilde, Color DoG: a Three-Channel Color Feature Detector for Embedded Systems, in Proceedings of Intelligent Robots and Computer Vision XXVII: Algorithms and Techniques, Edited by Casasent, David P.; Hall, Ernest L.; Röning, Juha. Proceedings of the SPIE, Volume 7539, Jan 2010.
James Archibald and Doran Wilde, Autonomous Vehicles: A Culminating Design Experience, Proceedings, Frontiers in Education: Computer Science and Computer Engineering (FECS’2010), pp. 182-186, Las Vegas, July, 2010.
J. A. Bayliss, J. A. Deetz, S. A. Ogilvie, C. B. Peterson, D. K. Wilde, The interface processor for the Intel VLSI 432 32-bit computer, IEEE Journal of Solid-State Circuits, Volume 16, Number 5, pp. 522-530, Oct 1981.
J. A. Bayliss, S. R. Colley, R. H. Kravitz, G. A. McCormick, W. S. Richardson, D. K. Wilde, L. L. Wittmer, The instruction decoding unit for the VLSI 432 general data processor, IEEE Journal of Solid-State Circuits, Volume 16, Number 5, pp. 531-537, Oct 1981.
J. A. Bayliss, J. A. Deetz, S. A. Ogilvie, C. B. Peterson, D. K. Wilde, The interface processor for the Intel VLSI 432 32-bit computer, IEEE Journal of Solid-State Circuits, Vol. 16, No. 5, pp. 522-530, Oct 1981.
D. Jurasek, W. Richardson, and D. Wilde, A Multiprocessor Design in Custom VLSI. VLSI Systems Design, pp. 26-30, June 1986.
R. Andonov, P. Quinton, S. Rajopadhye and D. Wilde. A shift register based systolic array for the general knapsack problem, Parallel Processing Letters, Volume 5, Number 2, pp. 251-262, June 1995.
Sanjay Rajopadhye and Doran Wilde, Memory Reuse Analysis in the Polyhedral Model, Parallel Processing Letters, Vol. 7 No. 2, pp 203-215, June 1997.
Vincent Loechner, and Doran Wilde, Parameterized Polyhedra and their Vertices, in the International Journal of Parallel Programming (IJPP), Volume 25, Number 6, pp. 525-549, Dec 1997.
Fabien Quillere, Sanjay Rajopadhye, Doran Wilde, Generation of Efficient Nested Loops from Polyhedra. International Journal of Parallel Processing (IJPP), Volume 28, Number 5, pp. 469-498, Oct 2000.
Doran Wilde, A Library for Doing Polyhedral Operations. In the Journal of Parallel Algorithms and Applications, Vol. 15, pp. 137-166, 2000.
Joshua H. Henrie, Doran K. Wilde, Planning, Continuous Curvature Paths Using Constructive Polylines, Journal of Aerospace Computing, Information, and Communication, Dec 2007, vol. 4, pp. 1143-1157.